Nima Kavand

E-mail

Phone

Visitor's Address

nima.kavand@tu-dresden.de

+49 351 463-40924

Helmholtzstrasse 18,  BAR-III61

Nima Kavand is working as a Research Associate on the project "Electronic design automation for designing secure circuits". He received his B.Sc. degree in Computer Engineering (hardware design) from the Shahid Beheshti University and M.Sc. degree in Computer Systems Architecture from the Sharif University of Technology, Tehran, Iran. His master's thesis focused on FPGA-accelerated stream Big Data processing. After his M.Sc., he was researching on HW acceleration of Machine Learning applications for about two years at the Sharif University of Technology. Nima joined the Chair of Processor Design at Technische Universität Dresden (TUD) in March 2021. His current research interests include VLSI design, FPGA and reconfigurable devices, large-scale computing systems, and Machine Learning.

Publication

  • 2023

  • Armin Darjani, Nima Kavand, Shubham Rai, Akash Kumar, "Discerning the Limitations of GNN-Based Attacks on Logic Locking", In Proceeding: Design Automation Conference (DAC), pp. 1-6, July 2023. [doi] [Bibtex & Downloads]
  • Nima Kavand, Armin Darjani, Shubham Rai, Akash Kumar, "Design of Energy-efficient RFET-based Exact and Approximate 4:2 Compressors and Multipliers", In IEEE Transactions on Circuits and Systems II: Express Briefs, pp. 1-1, May 2023. [doi] [Bibtex & Downloads]
  • Jens Trommer, Niladri Bhattacharjee, Thomas Mikolajick, Sebastian Huhn, Marcel Merten, Mohammed Elkacem Djeridane, ‪Muhammad Hassan, Rolf Drechsler, Shubham Rai, Nima Kavand, Armin Darjani, Akash Kumar, Violetta Sessi, Maximilian Drescher, Sabine Kolodinski, Maciej Wiatr, "Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable Transistors", In Proceeding: Design, Automation and Test in Europe Conference (DATE), IEEE/ACM, April 2023. [Bibtex & Downloads]

Previous Publications

Nima Kavand, Armin Darjani, Hamid Nasiri Bezenjani, and Maziar Goudarzi. "Accelerating distributed stream processing." U.S. Patent 10534737, issued January 14, 2020.