Salim Ullah

E-mail

Phone

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Visitor's Address

salim.ullah@tu-dresden.de

+49 351 463-40811

Helmholtzstrasse 18,  BAR-III62

Ph.D. Thesis Title: Design, Analysis, and Applications of Approximate Arithmetic Modules

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Publications

  • 2022

  • 21. Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar, "NetPU: Prototyping a Generic Reconfigurable Neural Network Accelerator Architecture", In Proceeding: 2022 International Conference on Field-Programmable Technology (ICFPT), pp. 1-1, Dec 2022. [doi] [Bibtex & Downloads]
  • 20. Amritha Immaneni, Salim Ullah, Suresh Nambi, Siva Satyendra Sahoo, Akash Kumar, "PosAx-O: Exploring Operator-level Approximatons for Posit Arithmetic in Embedded AI/ML" (to appear), In Proceeding: Euromicro Conference on Digital System Design (DSD), pp. 1-6, Aug 2022. [Bibtex & Downloads]
  • 19. Fanny Spagnolo, Salim Ullah, Pasquale Corsonello, Akash Kumar, "ERMES: Efficient Racetrack Memory Emulation System based on FPGA", In Proceeding: 2022 International Conference on Field-Programmable Logic and Applications (FPL), pp. 1-6, Aug 2022. [Bibtex & Downloads]
  • 18. Salim Ullah, Siva Satyendra Sahoo, Nemath Ahmed, Debabrata Chaudhury, Akash Kumar, "AppAxO: Designing Application-specific Approximate Operators for FPGA-based Embedded Systems", In ACM Transactions on Embedded Computing Systems (TECS), pp. 1–31, January 2022. [Bibtex & Downloads]
  • 17. Negar Neda, Salim Ullah, Azam Ghanbari, Hoda Mahdiani, Mehdi Modarressi, Akash Kumar, "Multi-Precision Deep Neural Network Acceleration on FPGAs" (to appear), In Proceeding: Asia and South Pacific Design Automation Conference (ASPDAC), 1/2022. [Bibtex & Downloads]
  • 2020

  • 11. Akhil Raj Baranwal, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar, "ReLAccS: A Multi-level Approach to Accelerator Design for Reinforcement Learning on FPGA-based Systems", In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Institute of Electrical and Electronics Engineers (IEEE), pp. 1–1, 28 October 2020. [doi] [Bibtex & Downloads]
  • 10. Arlene John, Salim Ullah, Akash Kumar, Barry Cardiff, Deepu John, "An Approximate Binary Classifier for Data Integrity Assessment in IoT Sensors", In Proceeding: 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS), IEEE, Nov 2020. [doi] [Bibtex & Downloads]
  • 9. Zahra Ebrahimi, Salim Ullah, Akash Kumar, "SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy", Proceedings of the 2020 on Great Lakes Symposium on VLSI, ACM, Sep 2020. [doi] [Bibtex & Downloads]
  • 8. S. Gupta, S. Ullah, K. Ahuja, A. Tiwari, A. Kumar, "ALigN: A Highly Accurate Adaptive Layerwise Log_2_Lead Quantization of Pre-Trained Neural Networks", In IEEE Access, vol. 8, pp. 118899-118911, June 2020. [Bibtex & Downloads]
  • 7. S. Ullah, H. Schmidl, S. S. Sahoo, S. Rehman, A. Kumar, "Area-optimized Accurate and Approximate Softcore Signed Multiplier Architectures", In IEEE Transactions on Computers, April 2020. [Bibtex & Downloads]
  • 6. S. Ullah, S. Gupta, K. Ahuja, A. Tiwari, A. Kumar, "L2L: A HIGHLY ACCURATE LOG_2_LEAD QUANTIZATION OF PRE-TRAINED NEURAL NETWORKS", In Proceeding: 2020 Design, Automation Test in Europe Conference Exhibition (DATE), March 2020. [Bibtex & Downloads]
  • 5. Zahra Ebrahimi, Salim Ullah, Akash Kumar, "LeAp: Leading-one Detection-based Softcore Approximate Multipliers with Tunable Accuracy", In Proceeding: 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), IEEE, Jan 2020. [doi] [Bibtex & Downloads]
  • 2019

  • 4. Adarsha Balaji, Salim Ullah, Anup Das, Akash Kumar, "Design Methodology for Embedded Approximate Artificial Neural Networks", Proceedings of the 2019 on Great Lakes Symposium on VLSI, ACM, pp. 489–494, New York, NY, USA, May 2019. [doi] [Bibtex & Downloads]
  • 2018

  • 3. Salim Ullah, Semeen Rehman, Bharath Srinivas Prabakaran, Florian Kriebel, Muhammad Abdullah Hanif, Muhammad Shafique, Akash Kumar, "Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators", Proceedings of the 55th Annual Design Automation Conference, pp. 159, June 2018. [Bibtex & Downloads]
  • 2. Salim Ullah, Sanjeev Sripadraj Murthy, Akash Kumar, "SMApproxlib: library of FPGA-based approximate multipliers", Proceedings of the 55th Annual Design Automation Conference, pp. 157, June 2018. [Bibtex & Downloads]
  • 1. B. S. Prabakaran, S. Rehman, M. A. Hanif, S. Ullah, G. Mazaheri, A. Kumar, M. Shafique, "DeMAS: An efficient design methodology for building approximate adders for FPGA-based systems", In Proceeding: 2018 Design, Automation Test in Europe Conference Exhibition (DATE), pp. 917-920, March 2018. [doi] [Bibtex & Downloads]