Hasna Bouraoui

Phone

Fax

E-mail

Visitor's Address

+49 (0)351 463 43710

+49 (0)351 463 39995

hasna.bouraoui@tu-dresden.de

Helmholtzstrasse 18,3rd floor, BAR III71

01069 Dresden
Germany

Curriculum Vitae

Hasna Bouraoui received her main engineering diploma in Computer Science from the National School of Computer Science (ENSI) Tunisia in September 2013. Her major specialisation is embedded systems. In May 2016, she was invited as a guest for a research internship in TU Dresden and joined the chair for Compiler Construction. In March 2017 she joined the chair as a PhD student and work in the context of deploying speaker recognition applications on heterogeneous multi-core embedded platforms. She aims at modelling such applications with abstract Models of Computation (MoC), e.g., Kahn Process Networks (KPNs), to help map them onto heterogeneous targets in an efficient way, where performance constraints (execution time, memory usage, energy consumption, etc.) can be met.

Publications

  • 2022

  • Hasna Bouraoui, Chadlia Jerad, Omar Romdhani, Jeronimo Castrillon, "mAPN: Modeling, Analysis, and Exploration of Algorithmic and Parallelism Adaptivity", arXiv, Jul 2022. [doi] [Bibtex & Downloads]
  • 2021

  • Hasna Bouraoui, Chadlia Jerad, Jeronimo Castrillon, "Towards Adaptive multi-Alternative Process Network", Proceedings of the 12th Workshop and 10th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM'21), co-located with 16th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC) (Bispo, João and Cherubin, Stefano and Flich, Jos'e), Schloss Dagstuhl – Leibniz-Zentrum für Informatik, vol. 88, pp. 1:1–1:11, Dagstuhl, Germany, Jan 2021. [doi] [Bibtex & Downloads]
  • 2019

  • Hasna Bouraoui, Jeronimo Castrillon, Chadlia Jerad, "Comparing Dataflow and OpenMP Programming for Speaker Recognition Applications", Proceedings of the 10th Workshop and 8th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM'19), co-located with 14th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC), ACM, pp. 4:1–4:6, New York, NY, USA, Jan 2019. [doi] [Bibtex & Downloads]