@Report{bouraoui_arxiv22,
author = {Bouraoui, Hasna and Jerad, Chadlia and Romdhani, Omar and Castrillon, Jeronimo},
title = {mAPN: Modeling, Analysis, and Exploration of Algorithmic and Parallelism Adaptivity},
doi = {10.48550/ARXIV.2207.07591},
url = {https://arxiv.org/abs/2207.07591},
copyright = {Creative Commons Attribution 4.0 International},
month = jul,
publisher = {arXiv},
year = {2022},
abstract = {Using parallel embedded systems these days is increasing. They are getting more complex due to integrating multiple functionalities in one application or running numerous ones concurrently. This concerns a wide range of applications, including streaming applications, commonly used in embedded systems. These applications must implement adaptable and reliable algorithms to deliver the required performance under varying circumstances (e.g., running applications on the platform, input data, platform variety, etc.).
Given the complexity of streaming applications, target systems, and adaptivity requirements, designing such systems with traditional programming models is daunting. This is why model-based strategies with appropriate Model of Computation (MoC) have long been studied for embedded system design. Dataflow models, in particular, are a good fit for streaming applications that execute in parallel on embedded devices. Most of today’s models, however, are based on static dataflow models with adaptivity extensions to describe data parallelism. Some dynamic dataflows capture dynamic behavior but offer only limited support for algorithmic adaptivity. This work provides algorithmic adaptivity on top of parallelism for dynamic dataflow to express larger sets of variants and trade-offs. We present a multi-Alternative Process Network (mAPN), a high-level abstract representation in which several variants of the same application coexist in the same graph expressing different implementations. We introduce multi-Alternative Process Network (mAPN) properties and its formalism to describe various local implementation alternatives. Furthermore, mAPNs are enriched with metadata to provide the alternatives with quantitative annotations in terms of a specific metric. To help the user analyze the rich space of variants, we propose a methodology to extract feasible variants under user and hardware constraints. At the core of the methodology is an algorithm for computing global metrics of an execution (e.g., execution time) of different alternatives from a compact mAPN specification. We validate our approach by exploring several possible variants created for the Automatic Subtitling Application (ASA) on two hardware platforms and analyzing the trade-off space. A comparison to the well-known analysis tool SDF3 is also performed, where we showed that we are more than 500 times faster for a large number of variants.}
}

@InProceedings{bouraoui_parma21,
author = {Hasna Bouraoui and Chadlia Jerad and Jeronimo Castrillon},
booktitle = {Proceedings of the 12th Workshop and 10th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM'21), co-located with 16th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC)},
title = {Towards Adaptive multi-Alternative Process Network},
doi = {10.4230/OASIcs.PARMA-DITAM.2021.1},
editor = {Bispo, Jo\~{a}o and Cherubin, Stefano and Flich, Jos\'{e}},
isbn = {978-3-95977-181-8},
location = {Budapest, Hungary},
pages = {1:1--1:11},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
series = {Open Access Series in Informatics (OASIcs)},
url = {https://drops.dagstuhl.de/opus/volltexte/2021/13637/pdf/OASIcs-PARMA-DITAM-2021-1.pdf},
volume = {88},
address = {Dagstuhl, Germany},
issn = {2190-6807},
month = jan,
numpages = {10},
urn = {urn:nbn:de:0030-drops-136378},
year = {2021},
}

@InProceedings{bouraoui_parma19,
author = {Hasna Bouraoui and Jeronimo Castrillon and Chadlia Jerad},
title = {Comparing Dataflow and OpenMP Programming for Speaker Recognition Applications},
booktitle = {Proceedings of the 10th Workshop and 8th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM'19), co-located with 14th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC)},
year = {2019},
series = {PARMA-DITAM 2019},
pages = {4:1--4:6},
articleno = {4},
numpages = {6},
address = {New York, NY, USA},
month = jan,
publisher = {ACM},
isbn = {978-1-4503-6321-1},
url = {http://doi.acm.org/10.1145/3310411.3310417},
doi = {10.1145/3310411.3310417},
acmid = {3310417},
location = {Valencia, Spain},
numpages = {6}
}

@article{Bouraoui_2017,
doi = {10.1145/2975161},
url = {https://doi.org/10.1145%2F2975161},
year = 2017,
month = {apr},
publisher = {Association for Computing Machinery ({ACM})},
volume = {16},
number = {3},
pages = {1--28},
author = {Hasna Bouraoui and Chadlia Jerad and Anupam Chattopadhyay and Nejib Ben Hadj-Alouane},
title = {Hardware Architectures for Embedded Speaker Recognition Applications},
journal = {{ACM} Transactions on Embedded Computing Systems}
}